The present invention relates to a variable-length code decoding circuit for decoding a compressed image, etc. and to a system for decoding variable-length code using the same.
There is the following literature disclosing a technique for decoding a variable-length code.
Literature: IEEE 1992 Custom Integrated Circuits Conference, "A Video-Rate, JPEG Chip Set" p. 26. 2. 1-26. 2. 4., authored by Daniel A. Luthi, Po Tong, and Peter A. Ruetz.
This literature discloses a technique using a variable-length code as a means for compressing image data or for restoring and decoding the compressed image data.
A variable-length code means a code which is allocated in response to the frequency of occurrence of parameters after the image data has been subjected to an arithmetic operation such as a Discrete Cosine Transform (hereinafter referred to as DCT) operation and a quantization operation. That is, a short code is allocated to a parameter which frequently occurs while occurs a long code is allocated to a parameter which less frequently. By varying the length of the code as mentioned above, the total length for a sequence number of codes can be reduced as a whole, thereby realizing an improvement in the compression rate of the image data.
Since the image display rate on of a TV set or a monitor must be kept at a given value when restoring a dynamic image, the variable length code as set forth above is always required to be restored at a constant rate. It is preferable in practice to decode one variable-length code in one clock cycle. Since image data is required to be processed at high speed in recent years, an improvement in the decoding speed of the variable-length code is important as one means for realizing a high processing speed of the image data.
It is an object of the invention to provide a variable-length code decoding circuit for realizing high operation speed.
It is another object of the invention to provide a variable-length code decoding system for realizing a high operation speed.